@phdthesis{oai:kitakyu.repo.nii.ac.jp:00000934,
 author = {ゾウ, セツシン},
 month = {2021-12-25},
 note = {Neural networks have been successfully implemented on various mobile hardware platforms. However, the high computational cost of neural networks, the large difference in computational accuracy with hardware, and the low structural similarity are often obstacles to be overcome in research.
This thesis presents the knowledge and research development on the cross-application of neural networks and logic circuits, including  an experimental procedure on implementation of multiple look up tables logic, an approximate decomposition method on decomposing larger size look-up tables into smaller individuals and a hardware-aware structured neural network.
In summary, the cost of implementing bidirectional interaction between neural networks and logic circuits can be effectively reduced by benefiting from the logic learning capability of neural networks, the decomposition method of large-size look up tables, and the hardware-aware structure of neural networks.},
 school = {北九州市立大学},
 title = {A Hardware-aware Neural Network with a Look-up Table Decomposition Algorithm},
 year = {}
}